The term “partitioning” in the context of system-level or ESL design refers to the process of subdividing an initial specification for a system, which is generally defined by a monolithic natural language document, executable specification, or legacy design, or a combination of all three, into a set of potentially concurrent cooperating processes, each of which may be described by documents, executable models, or legacy designs, or a combination of these forms, and of assigning them to a set of more or less abstract resources, representing processors for software, silicon area or IP blocks for hardware, communication channels, and storage resources (e.g., buses, memories). As such, it is also often called “HW/SW partitioning,” referring to one of the major architectural decisions that needs to be made. However, we prefer the more generic term “partitioning” because (1) subdividing the software among multiple processors is becoming more common today, (2) subdividing hardware implementation between multiple teams is required to keep the team size manageable, and (3) some implementation platforms, such as FPGAs and ASIPs, tend to blur the distinction between hardware and software. In Chapter 6, we discussed the issues involved in specification and modeling, and in Chapter 7 we discussed the kinds of pre-partitioning analysis it is possible to do with such specifications. One of the purposes of pre-partitioning analysis is to derive information that can be useful during the partitioning process.

Partitioning is an essential element of a system-level design flow because it exploits the different capabilities of hardware and software to satisfy different flexibility, performance, and power requirements. It can also speed up the overall design process by allowing teams to work in relative independence, as long as they obey the required interfacing constraints and satisfy their local functional specifications. By introducing interfaces, the team can dramatically simplify the verification of each partition in isolation. However, partitioning also reduces optimization opportunities by introducing barriers that can be either very expensive or impossible to cross.

In the current state of the art, electronic systems are designed with an ad hoc approach that is based heavily on earlier experience with similar products and on manual design. Often the design process requires several iterations to obtain convergence because the system is not specified in a rigorous and unambiguous fashion, and the levels of abstraction, details, and design styles in various parts are likely to be different. As the complexity of such systems scales up, this approach is showing its limits, especially regarding design and verification time. A sequence of two steps has traditionally been used to cope with the increased complexity and enhance designers’ productivity: abstraction and clustering. Abstraction means describing an object (e.g., a logic gate made of MOS transistors) using a model where some of the low-level details are ignored (e.g., the Boolean expression representing that logic gate). Clustering means connecting a set of objects at the same level of abstraction to get a new, more complex object. This new object usually exhibits new properties that are not part of the isolated models that constitute it.

8.1 Introduction
8.2 Functional Decomposition
8.3 Architecture Description
    8.3.1 Platforms
    8.3.2 Architectural Components
    8.3.3 Modeling Levels
    8.3.4 Platform Configuration and Simulation
8.4 Partitioning
    8.4.1 Refinement-Based Methods
    8.4.2 Explicit Mapping-Based Methods
    8.4.3 System Scheduling and Constraint Satisfaction
8.5 The Hardware Partition
    8.5.1 Module Refinement
8.6 The Software Partition
    8.6.1 Partitioning over Multiple Processors
    8.6.2 Partitioning over Multiple Tasks
    8.6.3 Worst-Case Execution Time Analysis
    8.6.4 The Operating System
        8.6.4.1 Commercial Operating Systems
        8.6.4.2 Custom Operating Systems
8    .6.5 Memory Partitioning
8.7 Reconfigurable Computing
    8.7.1 Reconfigurable Computing Architectures
    8.7.2 Dynamic Online Partitioning
8.8 Communication Implementation
    8.8.1 Interface Template Instantiation
    8.8.2 Interface Synthesis
8.9 Provocative Thoughts
8.10 Summary
8.11 The Prescription

Errata

Feedback